/* $Copyright:	$
 * Copyright (c) 1984, 1985, 1986, 1987, 1988, 1989, 1990 
 * Sequent Computer Systems, Inc.   All rights reserved.
 *  
 * This software is furnished under a license and may be used
 * only in accordance with the terms of that license and with the
 * inclusion of the above copyright notice.   This software may not
 * be provided or otherwise made available to, or used by, any
 * other person.  No title to or ownership of the software is
 * hereby transferred.
 */

#ident "$Header: st.h 1.30 89/10/26 $"

#ifndef	_SYS_ST_H_

/*
 * st.h
 *	symbols and structure definitions for Systech 1650 STREAMS driver.
 */

/* $Log:	st.h,v $
 */
/*
 * STREAMS version of 'tty' structure.  Most info is now in the ld0 module.
 * What remains here is needed by the driver.  One of these exists per
 * port.
 */
struct strtty	{
	queue_t	*qptr;			/* Local streams queue(wr)*/
	int 	t_cmask;		/* Carrier detect mask */
	dev_t	t_dev;			/* Device number */
	lock_t	t_ttylock;		/* Line structure lock */
	sema_t	t_rawqwait;		/* Carrier wait sema */
	sema_t	t_flushwait;		/* Output drain sema */
	int	t_state;		/* Current state of device */
	ushort  t_flags;		/* General driver flags */
	ushort	t_cflags;		/* Flags from termio c_cflags */
	int	t_breakid;		/* ID from break timeout call */
	int	t_drainid;		/* ID from drain timeout call */
	int	t_delayid;		/* ID from delay timeout call */
	uint	t_bufcallid;		/* ID from bufcall, if any */
	mblk_t	*msg;			/* Current output message */
	int	t_wcmd;			/* current usart setting */
	unchar  bfc_response[8];	/* st response saved for bufcall*/
	unchar  blkin_pending;		/* 1=BLKIN request sent to 1650 */
					/* 0=BLKIN reply sent to driver */
};
/* 
 * State bits for t_state.
 */
#define DRAINTIME 0x001
#define WOPEN	  0x002
#define ISOPEN	  0x004
#define CARR_ON	  0x010
#define BUSY	  0x020
#define WCLOSE	  0x040
#define TXDELAY	  0x100
#define SUSPOUT   0x200
#define TXBREAK   0x400

/*
 * State bits for t_flags.
 */
#define DISCARDIN 0x001

/*
 * Input and output buffer sizes. 
 * Rules enforced by the MTI firmware are:
 * 1) Sum of buffer sizes must not exceed 16*1024
 * 2) Each buffer size must be a multiple of 8
 * 3) Each buffer size must be >= 32
 *
 * Keep in mind that 1/2 of the output buffer is used by the 1650
 * for single character output.  Thus, if OS is 512, STMAXOUT must
 * 256 or less.  Same goes for the input buffer.
 *
 */
#define OS      128			/* output buffer size */
#define STMAXOUT OS/2			/* max output buffer size */
#define IS	(1024 - OS)		/* remainder for input buffer */
#define STMAXIN IS/2			/* max input buffer size */

/*
 * Input data buffer and mbad address structure.
 */
struct stinbuf {
	caddr_t	 st_buf;		/* Input character buffer */
	unsigned st_mbaddr;		/* MB address of input buffer */
/* 
 * This next flag shows if a block input has been started for the line
 * corresponding to this stinbuf structure.  The DYNIX 3.x st() driver
 * grabbed a cblock on first open after system boot and started a block
 * input into it (if block input was enabled.)  This start input/ timeout /
 * read buffered data / start input... cycle occurs even *after* the
 * systech line is closed.  The original author must have had a reason to
 * do this.  So, when the initial block input is started for a systech line
 * in this DYNIX/ptx(R)  driver, st_blockin is set to 1 and the restart will not
 * happen. (Restart causes a 20 11 error, redundant block input started...)
 */
	bool_t	st_blockin;		
};

/*
 * Per board data structure.
 */
struct stinfo {
	struct stdevice *st_addr;	/* board address */
	lock_t	st_lock;		/* board lock */
	unchar	st_cflags;		/* Block input or not block input */
	int	st_size;		/* number of lines */
	int	st_vector;		/* interrupt vector */
	int	st_mblevel;		/* MULTIBUS interrupt level */
	struct mb_desc *st_mbdesc; 	/* MULTIBUS descriptor */
	ushort st_basemap;		/* MULTIBUS base map register to use */
	unchar	st_response[8];		/* current response buffer */
	int	st_response_index;	/* index into st_response */
	int	st_response_length;	/* length of response in st_response */
	int st_chars[16];		/* char input count in last interval */
	int st_rate[16];		/* smoothed input count */
	struct strtty st_strtty[16];	/* streams version of tty structure */
	int st_mode[16];		/* imput mode: FAST or SLOW */
	struct stinbuf st_inbufs[16];	/* input buffers and their mbad addrs */
};

/* Block input Mode low/high water */
struct stlh {
	ushort	st_low;			/* low water mark */
	ushort	st_high;		/* high water mark */
};

/* Block Input Modes - st_mode */
#define	SLOW	0
#define	FAST	1

#define STLINE(x)	(minor((x))&0xf)
#define STBOARD(x)	(minor((x))>>4)

/*
 * Registers and bits for Systech MTI terminal interface.
 */

/*
 * I/O registers, read-only (RO) and write-only (WO).
 */
struct	stdevice {
	unchar	stcmd;			/* WO Command FIFO */
#define		stresp	stcmd		/* RO Response FIFO */
	unchar	stie;			/* WO Interrupt Enable bits */
#define		ststat	stie		/* RO Status */
	unchar	stgo;			/* WO Set Execute */
#define		stcra	stgo		/* RO Clear Response Available */
	unchar	streset;		/* WO Reset board */
#define		stclrtim streset	/* RO Clear timer */
	unchar	stres[4];		/* Reserved */
};

/* Status register */
#define ST_VD		0x80	/* Valid Data */
#define ST_TIMER	0x10	/* Timer Ticked */
#define ST_ERR		0x04	/* Command Error */
#define ST_RA		0x02	/* Response Available */
#define ST_READY	0x01	/* Ready to Accept Command */

/* Interrupt enable (same bits as status register) */
#define STI_TIMER	0x10	/* Timer Ticked */
#define STI_ERR		0x04	/* Command Error */
#define STI_RA		0x02	/* Response Available */
#define STI_READY	0x01	/* Ready to Accept Command */

/* Commands */
#define	ST_ESCI		0x00		/* Enable Single Character Input */
#define	ST_RSTAT	0x10		/* Read USART Status Register */
#define	ST_RERR		0x20		/* Read Error Code */
#define	ST_RBDATA	0x30		/* Return Buffered Data */
#define	ST_OUT		0x40		/* Single Character Output */
#define	ST_WCMD		0x50		/* Write USART Command Register */
#define	ST_DSCI		0x60		/* Disable Single Character Input */
#define	ST_CONFIG	0x70		/* Configuration Command */
#define	ST_BLKIN	0x80		/* Block Input */
#define	ST_BSCIN	0x90		/* BSC input */
#define	ST_ABORTIN	0xA0		/* Abort Input */
#define	ST_SUSPEND	0xB0		/* Suspend Output */
#define	ST_BLKOUT	0xC0		/* Block Output */
#define	ST_RESUME	0xD0		/* Resume Output */
#define	ST_ABORTOUT	0xE0		/* Abort Output */

/* Configure Commands */
#define	STC_ASYNC	0x00		/* Configure Asynchronous */
#define	STC_SYNC	0x10		/* Configure Synchronous */
#define	STC_MODES	0x20		/* Configure Modes */
#define STC_BSC		0x30		/* Configure BSC */
#define	STC_INPUT	0x40		/* Configure Input */
#define	STC_TMASK	0x50		/* Termination Mask */
#define	STC_OUTPUT	0x60		/* Configure Output */
#define STC_MODEM	0x70		/* Modem Status */
#define	STC_BUFSIZ	0x80		/* Buffer Sizes */
#define	STC_TIMER	0x90		/* Configure Timer */

/* Configure Async bytes */
#define CCA2		0x03
#define CCA3		0x70
#define CCA4		0x27

/* Flags */
#define STF_BI	  	0x01		/* block input allowed */

/* 2661 Programming Bytes */
#define	STB_MSTOP1	0x40
#define STB_MSTOP15	0x80
#define STB_MSTOP2	0xC0
#define STB_ODD_PARITY	0x10
#define STB_EVEN_PARITY	0x30
#define STB_NO_PARITY	0x00
#define STB_BITS5	0x00
#define STB_BITS6	0x04
#define STB_BITS7	0x08
#define STB_BITS8	0x0C
#define STB_M50		0x00
#define STB_M75		0x01
#define STB_M110	0x02
#define STB_M134	0x03
#define STB_M150	0x04
#define STB_M300	0x05
#define STB_M600	0x06
#define STB_M1200	0x07
#define STB_M1800	0x08
#define STB_M2000	0x09
#define STB_M2400	0x0A
#define STB_M3600	0x0B
#define STB_M4800	0x0C
#define STB_M7200	0x0D
#define STB_M9600	0x0E
#define STB_M19200	0x0F

/*
 * Timer constants.
 * NOTE: The values in the names are somewhat
 * rounded because the timer is not highly accurate.
 */
#define	STT_530		0x0		/* 530 msec */
#define	STT_353		0x1		/* 353 msec */
#define	STT_241		0x2		/* 241 msec */
#define	STT_197		0x3		/* 197 msec */
#define	STT_177		0x4		/* 177 msec */
#define	STT_88		0x5		/* 88 msec */
#define	STT_44		0x6		/* 44 msec */
#define	STT_22		0x7		/* 22 msec */
#define	STT_15		0x8		/* 15 msec */
#define	STT_13		0x9		/* 13 msec */
#define	STT_11		0xa		/* 11 msec */
#define	STT_7		0xb		/* 7 msec */
#define	STT_5		0xc		/* 5 msec */
#define	STT_4		0xd		/* 4 msec */
#define	STT_3		0xe		/* 3 msec */
#define	STT_1		0xf		/* 1 msec */

/*
 * Usart command/status register bits
 */
#define DSR		0x80		/* Status */
#define DCD		0x40		/* Status */
#define FE		0x20		/* Status */
#define OE		0x10		/* Status */
#define PE		0x08		/* Status */
#define RTS		0x20		/* Cmd */
#define RERR		0x10		/* Cmd */
#define SBRK		0x08		/* Cmd */
#define RXEN		0x04		/* Cmd */
#define DTR		0x02		/* Cmd */
#define TXEN		0x01		/* Cmd */

/* Error Codes */
#define STE_MEMERR	0x04	/* Memory Address Error */

#define STDPUTBACK	1	/* put back standard message */
#define PRIPUTBACK	2	/* put back priority message */

/* 
 * When stclose() is called with data remaining on the write
 * queue (to be sent out), the driver must wait for a while
 * until the data drains.  Since we can only find out the number
 * of messages on the write queue (via qsize()), we must guess
 * the average number of bytes in each message on the write queue.
 * This is the purpose of ST_AVGCNT.....
 */
#define ST_AVGCNT  5			/* Guess 5 bytes per msg */

extern unchar st_bin;
extern st_flags;

#define	_SYS_ST_H_
#endif	/* _SYS_ST_H_ */
